Position Overview

We are seeking an ASIC / SoC Design & Verification Lead to play a key technical leadership role in the design, integration, verification, and delivery of complex System‑on‑Chips that are central to AST’s satellite communications platforms.

The Silicon Team in Edinburgh is a small, highly focused group responsible for developing high‑value silicon that is core to AST’s mission of “Connecting the unconnected”—delivering the world’s first space‑based mobile broadband network.

The team works collaboratively to define and build next‑generation silicon, exploring advanced silicon technologies to continuously improve performance, capability, and efficiency. This is a hands‑on environment where silicon decisions directly impact AST’s ability to deliver a global communications network from space.

This role combines deep technical expertise with hands‑on leadership, owning major aspects of SoC design while coordinating closely with architecture, software, and external partners. You will drive design and verification execution from specification through implementation, ensuring quality, performance, and schedule alignment.

Key Responsibilities:

• Lead design and verification for a complex SoC, from micro‑architecture definition through implementation.
• Work with internal and external stakeholders, including architecture, software, validation, and silicon partners.
• Drive design and verification reviews, ensuring technical rigor, risk management, and alignment with system requirements.
• Ensure strong project execution, meeting schedule, quality, and performance goals.
• Lead and mentor junior team members, providing technical guidance and design best practices.
• Own major aspects of SoC design and verification execution.
• Apply strong SystemVerilog skills in design and verification activities.
• Apply good understanding of UVM methodology.
• Apply competency in Python scripting or programming.

Qualifications

Education:

BEng in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.

Experience:

• Deep knowledge of hardware and digital design fundamentals.
• Experience with SoC integration on a large design.
• Strong experience in SystemVerilog.
• Good understanding of UVM methodology.
• Prior experience on complex RTL designs such as high‑speed I/O, CPUs, DSP, accelerators, or complex network‑on‑chip implementations.
• Ability to write clear, high‑quality micro‑architecture specifications.
• Experience leading design and verification activities for complex SoCs.
• Competency in Python scripting or programming.

Preferred Qualifications:

• Master’s or PhD degree in a relevant technical discipline.
• RF knowledge.
• Exposure to communications, signal processing, or mixed‑signal ASICs/SoCs.

Soft Skills:

• Hands‑on technical leadership capability.
• Ability to coordinate closely with architecture, software, validation, and external partners.
• Ability to lead and mentor junior engineers.
• Strong collaboration skills within cross‑functional teams.

Technology Stack:

• SystemVerilog.
• UVM methodology.
• Python scripting or programming.

Physical Requirements

• Ability to work in a standard office environment and use a computer for extended periods.
• Occasional travel may be required to visit suppliers or other AST SpaceMobile design centers.

This job description may not be inclusive to the duties and responsibilities listed. Additional tasks may be assigned to the employee from time to time or the scope of the job may change as needed by business demands.